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Development of a time-domain physical model of core losses
Modelling core losses is a key step in any advanced design procedure for inductors or transformers. The HPE laboratory has developed in the past years a new physical core loss model. This project aims at adapting it from frequency-domain to time domain to integrate it in circuit simulation tools.
Keywords: "core loss, modelling, power electronics, electromagnetic, field calculation, electronics, electronic, simulation"
At HPE, core loss models are developed for optimising different inductor or
transformer designs. Recently, HPE released a novel innovative core loss
model based on physical derivations. So far, the current implementation
of the model is done only in frequency domain.
To integrate the new core loss model in circuit-based simulation tools
(such as PLECS or SPICE), the model must be modified to operate also
in time domain. In this project, you will first analyse the frequency domain
implementation. In a second step you will develop and implement a method
to adapt the outcome of the core loss model so that it can be used in timedomain
simulations using PLECS, based for instance on equivalent circuits
representing the core losses.
Thanks to this project, you will learn how to combine coding and physical
modelling to develop advanced electronics design automation (EDA) tools
for power electronics.
At HPE, core loss models are developed for optimising different inductor or transformer designs. Recently, HPE released a novel innovative core loss model based on physical derivations. So far, the current implementation of the model is done only in frequency domain. To integrate the new core loss model in circuit-based simulation tools (such as PLECS or SPICE), the model must be modified to operate also in time domain. In this project, you will first analyse the frequency domain implementation. In a second step you will develop and implement a method to adapt the outcome of the core loss model so that it can be used in timedomain simulations using PLECS, based for instance on equivalent circuits representing the core losses. Thanks to this project, you will learn how to combine coding and physical modelling to develop advanced electronics design automation (EDA) tools for power electronics.
Dr. Théophane Dimier, ETL F17, tdimier@hpe.ee.ethz.ch
Dr. Théophane Dimier, ETL F17, tdimier@hpe.ee.ethz.ch
Dimier_TimeDomain_CoreLoss.pdf
