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Evaluation of a Circuit Topology Based on Diode Opening Switches to Generate Nanosecond High-Power Pulses
A circuit topology to generate high-power nanosecond pulses with drift step-recovery diodes (DSRD) acting as opening switches should be analyzed and implemented.
Particle accelerators, such as the LHC at CERN, the SLS 2.0 at PSI, or
the PETRA IV at DESY, require kicker systems to inject or extract particle
bunches into or out of the particle beam. These kicker systems are driven
by high-voltage pulses. For new synchrotrons like the SLS 2.0, the duration
of these pulses must be in the nanosecond range to meet the strict timing
requirements. This is impossible to achieve with normal semiconductor
devices like MOSFETs. Therefore, pulse generators based on special diodes
(drift step recovery diodes, DSRDs) with ultra-fast turn-off behavior are
currently being investigated at HPE. To utilize these diodes as opening
switches in pulse generators, they must be driven in a distinct manner.
In this thesis, you will evaluate a possible circuit topology for driving these
diodes. This requires modelling and simulating the circuit and its components
with tools like LTspice, MATLAB, and COMSOL/Ansys. If time
permits, a hardware can be designed, implemented, and tested.
Particle accelerators, such as the LHC at CERN, the SLS 2.0 at PSI, or the PETRA IV at DESY, require kicker systems to inject or extract particle bunches into or out of the particle beam. These kicker systems are driven by high-voltage pulses. For new synchrotrons like the SLS 2.0, the duration of these pulses must be in the nanosecond range to meet the strict timing requirements. This is impossible to achieve with normal semiconductor devices like MOSFETs. Therefore, pulse generators based on special diodes (drift step recovery diodes, DSRDs) with ultra-fast turn-off behavior are currently being investigated at HPE. To utilize these diodes as opening switches in pulse generators, they must be driven in a distinct manner. In this thesis, you will evaluate a possible circuit topology for driving these diodes. This requires modelling and simulating the circuit and its components with tools like LTspice, MATLAB, and COMSOL/Ansys. If time permits, a hardware can be designed, implemented, and tested.
Tobias Wagner, ETL F17, wagner@hpe.ee.ethz.ch
Tobias Wagner, ETL F17, wagner@hpe.ee.ethz.ch
30% Coding
40% Simulation
30% Theory
30% Coding 40% Simulation 30% Theory
• Interest/knowledge in power
electronics
• Interest in modeling and simulating
components and circuits
Working language: English/German
• Interest/knowledge in power electronics • Interest in modeling and simulating components and circuits Working language: English/German