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Microelectronic circuit design for neural interfaces in 0.18um CMOS technology
This project is about the development of integrated circuits to study neurons and neural networks, and may comprise different parts of the design including analog and/or digital microelectronics, PCB design, signal processing and programming.
Neural interfaces are aimed at creating links between neurons and computers, enabling advanced electrophysiology studies and opening paths to restoring lost functions in the nervous system. CMOS technology allows for low-noise recording from thousands of electrodes in parallel, either in-vitro or in-vivo.
We are developing CMOS neural interfaces integrating different functionalities, including the detection of action potentials, stimulation of neurons, or impedance imaging. In this context, we can offer Master/Bachelor theses and semester projects tailored to the experience and interests of the student. These project may be, for example:
- Design of the analog front-end for a CMOS neural interface in 180nm. This may include the design of low-noise amplifiers, filters, analog to digital converters, sigma-delta modulators, etc. Potential tasks would be: system design, circuit design and simulation, noise/power/area optimization, layout, parasitics extraction, post-layout simulations.
- Design of a LVDS buffer for high-speed (>1Gbps) communication between the neural interface and the PC. Potential tasks would be: circuit design and simulation, speed/power optimization, LVDS receiver selection, PCB design.
- Design of the on-chip digital signal processing and control logic. Potential tasks would be: VHDL/Verilog coding, synthesis, place and route, area/power optimization, simulation.
Students interested in PCB design, programming or signal processing are also encouraged to contact me for other possible projects.
International students are asked to contact me at least 2/3 months before the target starting date of the project.
Neural interfaces are aimed at creating links between neurons and computers, enabling advanced electrophysiology studies and opening paths to restoring lost functions in the nervous system. CMOS technology allows for low-noise recording from thousands of electrodes in parallel, either in-vitro or in-vivo.
We are developing CMOS neural interfaces integrating different functionalities, including the detection of action potentials, stimulation of neurons, or impedance imaging. In this context, we can offer Master/Bachelor theses and semester projects tailored to the experience and interests of the student. These project may be, for example:
- Design of the analog front-end for a CMOS neural interface in 180nm. This may include the design of low-noise amplifiers, filters, analog to digital converters, sigma-delta modulators, etc. Potential tasks would be: system design, circuit design and simulation, noise/power/area optimization, layout, parasitics extraction, post-layout simulations.
- Design of a LVDS buffer for high-speed (>1Gbps) communication between the neural interface and the PC. Potential tasks would be: circuit design and simulation, speed/power optimization, LVDS receiver selection, PCB design.
- Design of the on-chip digital signal processing and control logic. Potential tasks would be: VHDL/Verilog coding, synthesis, place and route, area/power optimization, simulation.
Students interested in PCB design, programming or signal processing are also encouraged to contact me for other possible projects. International students are asked to contact me at least 2/3 months before the target starting date of the project.
Not specified
Dr. Fernando Cardes (Fernando.cardes@bsse.ethz.ch)
Dr. Fernando Cardes (Fernando.cardes@bsse.ethz.ch)