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PhD position in analog VLSI for designing memristor-based event-driven few-shot on-chip learning
We have one PhD position in the Emerging Intelligent Substrates lab for an exciting new project on designing event-driven few-shot learning algorithms and hardware implementations for intelligent edge applications.
This is part of the recently accepted SNSF Starting Grant, “UNITE: Brain-inspired device-circuits-algorithm co-design for resource-constrained hardware on the edge”.
The project will follow a co-design to take the best out of the worlds of memory devices, circuits and brain-inspired algorithm, by capitalizing on the following.
- Access to BEOL-integrated resistive memory devices (OxRAM, FTJ, PCM) into 130 nm, and 28 nm technologies.
- Our two recently proposed neuro-inspired hardware architectures based on (i) hardware-aware dendrites for fast and energy efficient feature detection [1], and small-world connectivity for fast information transfer and energy efficient information routing [2].
- Recent NeuroAI algorithms bridging machine learning and neuroscience for efficient on-device few-shot learning [3].
Keywords: AI hardware
On-device learning
Memristors
Neuromorphic
The PhD candidate should have a Master’s degree in Electrical/ Computer Engineering, with a strong background in analog circuit design and hardware accelerator design: i.e. should have taken classes in VLSI design, have systems knowledge, and performed analog ASIC design in a prior project. Previous experience with chip tape-outs is preferred.
The PhD candidate is expected to be passionate and curious about the workings of the brain.
The ideal applicant would have experience in one or possibly more of these areas:
* Cadence IC design tools
* Analog circuit design
* Asynchronous digital circuit design
* Resistive memory devices and technologies
The PhD candidate should have a Master’s degree in Electrical/ Computer Engineering, with a strong background in analog circuit design and hardware accelerator design: i.e. should have taken classes in VLSI design, have systems knowledge, and performed analog ASIC design in a prior project. Previous experience with chip tape-outs is preferred. The PhD candidate is expected to be passionate and curious about the workings of the brain.
The ideal applicant would have experience in one or possibly more of these areas:
* Cadence IC design tools * Analog circuit design * Asynchronous digital circuit design * Resistive memory devices and technologies
The goal is to design an AI hardware that is capable of learning in real-time.
The goal is to design an AI hardware that is capable of learning in real-time.